1. Field of the Invention
This invention relates to a drive circuit for display devices used as devices for displaying television pictures or computer output images, and more particularly to a drive circuit for liquid-crystal color display devices.
2. Related Background Art
FIG. 7 illustrates the constitution of a system of liquid-crystal display devices conventionally used. In FIG. 7, reference numeral 1 denotes a signal input terminal from which television signals or the like are fed; 2, a decoder which converts them into red (R), green (G) and blue (B) color signals; 4, a reversal control and signal amplifying part where the signals are successively forward-backward changed at given intervals into signals for liquid-crystal driving; and 5, a logic part where pulses for reverse control and liquid-crystal display panel driving are formed. Reference numeral 6 denotes a liquid-crystal display panel, of which reference numeral 7 denotes a horizontal shift register (HSR) serving as a horizontal-direction scanning means; 8, a vertical shift register (VSR) serving as a vertical-direction scanning means; and 9, a pixel area.
In general, TN type or STN type liquid crystals are said to have a response speed of several to several tens of ms. Hence, when interlaced scanning is performed in liquid-crystal display devices in the same way as in CRTs, the scanning can not follow a swift movement of the picture, resulting in a lowering of dynamic resolution. Meanwhile, when the interlaced scanning is performed, signals are written in the same pixel at a cycle of 30 Hz, and, taking account of the reversal of signal polarity which is done so as to prevent the liquid crystal from burning, liquid-crystal signals with the same polarity are written at a cycle of 15 Hz. The lowering of hold potential at the pixel area and the asymmetry of signals with respect to common electrodes cause a change in brightness of the picture at this cycle, so that, since human's eyes are sensitive to flickering of 30 Hz or below, flicker occurs to cause a lowering of image quality.
To solve such problems in interlaced scanning, a method is known in which the signal on the n-th line in the even-numbered field on the even-numbered field and the signal on the n-th line in the odd-numbered field on the odd-numbered field are written in the same line of the liquid-crystal display panel. The signals thus written in each line for each field on the liquid-crystal display panel are shown in Table 1 below. Here, O.sub.n (m) indicates data that is sampled at the timing where the signal on the n-th line in the odd-numbered field, of interlacing signals on an m-th frame is matched to the pixel arrangement of the display panel. In this instance, signals are written in the same pixel at a cycle of 60 Hz, and human's eyes can not follow the change in brightness of the picture at this cycle, so that the lowering of image quality caused by flicker does not occur. Also, since the whole picture is rewritten at 60 Hz, the scanning can follow the swift change of the picture.
TABLE 1 ______________________________________ Pixel line 1st-field 2nd-field 3rd-field 4th-field ______________________________________ n-2 line O.sub.n-2 (1) E.sub.n-2 (1) O.sub.n-2 (2) E.sub.n-2 (2) n-1 line O.sub.n-1 (1) E.sub.n-1 (1) O.sub.n-1 (2) E.sub.n-1 (2) n line O.sub.n (1) E.sub.n (1) O.sub.n (2) E.sub.n (2) n+1 line O.sub.n+1 (1) E.sub.n+1 (1) O.sub.n+1 (2) E.sub.n+1 (2) n+2 line O.sub.n+2 (1) E.sub.n+2 (1) O.sub.n+2 (2) E.sub.n+2 (2) ______________________________________
Another method is also known in which, using a frame memory, the signal of an interlaced even-numbered field and the signal of an interlaced odd-numbered field are synthesized into a single image on the memory, and the synthesized image is converted into a line-sequential scanning signal and displayed at 60 Hz. In this instance, the same image signal is consecutively displayed for two fields. The signals thus written in each line for each field on the liquid-crystal display panel are shown in Table 2 below. Here, O.sub.n (m) indicates data which are sampled at the timing where the signal on the n-th line of the odd-numbered field, of interlacing signals on an m-th frame is matched to the pixel arrangement of the display panel.
TABLE 2 ______________________________________ Pixel line 1st-field 2nd-field 3rd-field 4th-field ______________________________________ 2n-2 line E.sub.n-1 (1) E.sub.n-1 (1) E.sub.n-1 (2) E.sub.n-1 (2) 2n-1 line O.sub.n-1 (1) O.sub.n-1 (1) O.sub.n-1 (2) O.sub.n-1 (2) 2n line E.sub.n (1) E.sub.n (1) E.sub.n (2) E.sub.n (2) 2n+1 line O.sub.n (1) O.sub.n (1) O.sub.n (2) O.sub.n (2) 2n+2 line E.sub.n+1 (1) E.sub.n+1 (1) E.sub.n+1 (2) E.sub.n+1 (2) ______________________________________
FIG. 8 illustrates the constitution of a system where the frame memory is used. In FIG. 8, reference numeral 44 denotes an A-D (analog-to-digital) converter part; 45, the frame memory; and 46, a D-A (digital-to-analog) converter part. In this instance also, signals are written in the same pixel at a cycle of 60 Hz, and a human's eyes can not follow the change in brightness of the picture at this cycle, so that the lowering of image quality caused by flicker does not occur. Also, since the whole picture is rewritten at 60 Hz, the scanning can follow the swift change of the picture.
However, the conventional liquid-crystal display devices described above have the following problems. First, in the case of a liquid-crystal display panel in which the number of vertical scanning signal lines are reduced to half, a low cost can be achieved and the system can be set up with ease, but on the other hand the vertical resolution becomes reduced to half. Image deterioration may occur especially in the display of small characters or letters such as subtitle lettering and in the details of pictures, tending to bring about a problem when displayed on a large screen.
Second, the system of the type making use of the frame memory has no problem on the vertical resolution but requires the A-D converter and the D-A converter, resulting in a large scale of the whole system, and is disadvantageous for making the device compact. Also, since the frame memory itself is expensive, there is the problem of cost increase. Still also, a larger power consumption must be accepted. Moreover, from the viewpoint of image quality, a system employing a digital memory has a restriction on the number of bits, so that there is the problem of limitation on the gradation of the whole display system employing a liquid crystal that can display pictures with a gradation which in principle is infinite in accordance with analog voltage.
Still another method is also known in which as shown in FIG. 9, a sample hold means is formed correspondingly to data signal lines so that the whole picture is rewritten at 60 Hz while holding signals for one line or two lines. In FIG. 9, reference numeral 41 denotes a capacitor for storing the signals; and 42, a control terminal through which the stored image signals are transferred to the data signal lines.
However, when such a memory means is formed inside the liquid-crystal display panel, buffer amplifiers must be provided for the respective data signal lines together with the sample hold means, or correction must be made for the potential drop at the time of signal transfer. When the memory means is formed outside the liquid-crystal display panel, there is the problem that wiring is required correspondingly to the number of lines connecting the sample hold means with the data signal lines. Moreover, since in such parallel output the sample hold means and the data signal lines necessarily correspond in a one-to-one fashion, it has been difficult to realize special reproduced images, e.g., to enlarge or reduce the size of picture in the horizontal direction and to reverse the picture right and left, utilizing such sample hold means.